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nn30320a page 1 of 32 product standards 3 a synchronous dc-dc step down regulator (v in = 4.5 v to 28 v, v out = 0.75 v to 5.5 v) ? high-speed response dc-dc step down regulator circuit that employs hysteretic control system ? two 20 m ? (typ) mosfets for high efficiency at 3 a ? skip (discontinuous) mode for light load efficiency ? maximum output current : 3 a ? input voltage range : av in = 4.5 v to 28 v, pv in = 4.5 v to 28 v ? output voltage range : 0.75 v to 5.5 v ? selectable switching frequency : 210 khz, 430 khz, 650 khz ? adjustable soft start ? low operating and standby quiescent current ? power good indication for output over and under voltage ? built-in under voltage lockout (uvlo), thermal shut down (tsd), over voltage detection (ovd), under voltage detection (uvd), over current protection (ocp), short circuit protection (scp) ? 24 pin plastic quad flat non-leaded package heat slug down (qfn type) (size : 4 mm ? 4 mm ? 0.7 mm, 0.5 mm pitch) features description nn30320a is a synchronous dc-dc step down regulator (1-ch) comprising of a controller ic and two power mosfets and employs the hysteretic control system. by this system, when l oad current changes suddenly, it responds at high speed and minimizes the changes of output voltage. since it is possible to use capacitors with small capacitance and it is unnecessary to add external parts for system phase compensati on, this ic realizes downsizing of set and reducing in the number of external parts. output voltage is adjustable by user. maximum current is 3 a. high current distributed power systems such as ~ hdds (hard disk drives) ~ ssds (solid state drives) ~pcs ~ game consoles ~ servers ~ security cameras ~ network tvs ~ home appliances ~ oa equipment etc. applications application circuit example efficiency curve note : the application circuit is an example. the operation of the mass production set is not guarant eed. sufficient evaluation and verification is required in the design of the mass production set. the customer is fully responsible for the incorporation of the above illustrated application circui t in the design of the equipment. http://www.semicon. panasonic.co.jp/en/ vfb vreg en pgood bst lx pgnd agnd ss avin pvin vreg avin nn30320a pvin vout v out = 1.2 v 1 h 10 f ? 2 100 k? 22 f ? 2 0.1 f 1.5 k? 1.5 k? 1 f 10 nf 0.1 f 10 f ? 2 0.1 f condition : v in = 12 v, v out setting = 1.05 v, 1.2 v, 1.8 v, 3.3 v, 5.0 v, switching frequency = 650 khz, fccm / skip mode, l o = 1 h, c o = 44 f (22 f ? 2) doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 2 of 32 product standards absolute maximum ratings parameter symbol rating unit notes supply voltage v in 30 v *1 operating free-air temperature t opr ? 40 to + 85 ? c *2 operating junction temperature t j ? 40 to + 150 ? c *2 storage temperature t stg ? 55 to + 150 ? c *2 input voltage range v mode ,v fsel ,v out ,v fb ? 0.3 to (v reg + 0.3) v *1 *3 v en ? 0.3 to 6.0 v *1 output voltage range v pgood ? 0.3 to (v reg + 0.3) v *1 *3 v lx ? 0.3 to (v in + 0.3) v *1 *4 esd hbm 2 kv ? notes : this product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum rating. this rating is the maximum rating and device operating at this range is not guaranteed as it is higher than our stated recommended operating range. when subjected under the absolute maximum rating for a l ong time, the reliability of the product may be affected. v in is voltage for avin, pvin. v in = av in = pv in . do not apply external currents and voltages to any pin not specifically mentioned. *1 : the values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2 : except for the power dissi pation, operating ambient temper ature, and storage temperature, all ratings are for t a = 25 ? c. *3 : (v reg + 0.3) v must not exceed 6 v. *4 : (v in + 0.3) v must not exceed 30 v. ordering information order number feature package output supply nn30320a-vb maximum output current : 3 a 24 pin hqfn emboss taping doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 3 of 32 product standards recommended operating conditions parameter symbol min typ max unit notes supply voltage range av in 4.5 12 28 v ? pv in 4.5 12 28 v ? input voltage range v mode ?0.3 ? v reg + 0.3 v *1 v fsel ?0.3 ? v reg + 0.3 v *1 v en ? 0.3 ? 5.0 v ? output voltage range v pgood ?0.3 ? v reg + 0.3 v *1 v lx ?0.3 ? v in + 0.3 v *2 notes : voltage values, unless otherwise specified, are with respect to gnd. gnd is voltage for agnd, pgnd. agnd = pgnd v in is voltage for avin, pvin. v in = av in = pv in . do not apply external currents or voltages to any pin not specifically mentioned. *1 : (v reg + 0.3) v must not exceed 6 v. *2 : (v in + 0.3) v must not exceed 30 v. power dissipation rating notes : for the actual usage, please follow the power supply voltage, load and ambient temperature conditions to ensure that th ere is enough margin and the thermal design does not exceed the allowable value. *1:glass epoxy substrate (4 layers) [50 ? 50 ? 0.8 t (mm)] *2:glass epoxy substrate (4 layers) [50 ? 50 ? 1.57 t (mm)] package ? j-a ? j-c pd (ta = 25 ? c) pd (ta = 85 ? c) notes 24 pin plastic quad flat non-leaded package heat slug down (qfn type) 59.7 ? c / w 8.9 ? c / w 2.094 w 1.088 w *1 40.4 ? c / w 7.1 ? c / w 3.094 w 1.608 w *2 caution although this ic has built -in esd protection circuit, it may st ill sustain permanent damage if not handled properly. therefore, proper esd precautions are recommended to avoid electrostatic damage to the mos gates. doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 4 of 32 product standards parameter symbol condition limits unit note min typ max current consumption consumption current at active i opr v en = 5 v, i out = 0 a r fb1 = 1.5 k ? r fb2 = 1.5 k ? v mode = gnd (skip mode) ? 650 1000 a ? consumption current at standby i stb v en = 0 v ? 2 4 a ? logic pin characteristics en pin low level input voltage v enl ???0 . 3v ? en pin high level input voltage v enh ? 1.5 ? 5.0 v ? en pin leak current i leaken v en = 5 v ? 6.25 12.5 a ? mode pin low level input voltage v mdl ??? v reg ? 0.3 v? mode pin high level input voltage v mdh ? v reg ? 0.7 ?v reg v? mode pin leak current i leakmd v mode = 5 v ? 25 50 a ? fsel pin low level input voltage v fsl ???0 . 3v ? fsel pin high level input voltage v fsh ?? v reg ?0.1 ?v*1 fsel pin leak current i leakfs v fsel = 5 v ? 15.0 25.0 a ? vreg characteristics output voltage v reg i vreg = 6 ma 5.4 5.7 6.0 v ? line regulation v reglin v reglin = v reg (v in = 12 v) ?v reg (v in = 6 v) i vreg =6 ma ? ? 200 mv ? drop out voltage v regdo v in = 4.5 v i vreg =6 ma 4.11 ? ? v ? electrical characteristics c o = 22 f ? 2, l o = 1 h, v out setting = 1.2 v, v in = av in = pv in = 12 v, switching frequency = 650 khz, v mode = v reg (fccm) t a = 25 ? c ? 2 ? c unless otherwise noted. note : *1 : typical design value doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 5 of 32 product standards parameter symbol condition limits unit note min typ max vfb characteristics vfb comparator threshold v fbth ? 0.594 0.600 0.606 v ? vfb pin leak current 1 i leakf1 v fb = 0 v ? 1 ? 1 a ? vfb pin leak current 2 i leakf2 v fb = 6 v ? 1 ? 1 a ? under voltage lockout (uvlo) uvlo detection voltage v uvlode v in = 5 v to 0 v 3.5 3.8 4.1 v ? uvlo recover voltage v uvlore v in = 0 v to 5 v 3.9 4.2 4.5 v ? pgood characteristics pgood threshold 1 (v fb ratio for uvd detect) v pguv v pgood : high to low 77 85 93 % ? pgood hysteresis 1 (v fb ratio for uvd release) ? v pguv v pgood : low to high 3.5 5.0 6.5 % ? pgood threshold 2 (v fb ratio for ovd detect) v pgov v pgood : high to low 107 115 123 % ? pgood hysteresis 2 (v fb ratio for ovd release) ? v pgov v pgood : low to high 3.5 5.0 6.5 % ? pgood on resistance r pgood ? ? 10 15 ? ? electrical characteristics (continued) c o = 22 f ? 2, l o = 1 h, v out setting = 1.2 v, v in = av in = pv in = 12 v, switching frequency = 650 khz, v mode = v reg (fccm) t a = 25 ? c ? 2 ? c unless otherwise noted. doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 6 of 32 product standards parameter symbol condition limits unit note min typ max dc-dc characteristics line regulation v lin v in = 6 v to 28 v i out = 0.5 a ? 0.25 0.75 %/v ? load regulation v loa i out = 10 ma to 3 a ? 3.5 ? % *1 output ripple voltage 1 v r1 i out = 10 ma ? 20 ? mv [p-p] *1 output ripple voltage 2 v r2 i out = 1.5 a ? 20 ? mv [p-p] *1 load transient response 1 ? v tr1 i out = 100 ma to 1.5 a ? t = 0.5 a / s ?20?mv*1 load transient response 2 ? v tr2 i out = 1.5 a to 100 ma ? t = 0.5 a / s ?20?mv*1 high side power mosfet on resistance r onh v gs = 5.7 v ? 20 40 m? ? low side power mosfet on resistance r onl v gs = 5.7 v ? 20 40 m? ? min input and output voltage difference v diff v diff =v in ?v out ?2.5?v*1 note : *1 : typical design value electrical characteristics (continued) c o = 22 f ? 2, l o = 1 h, v out setting = 1.2 v, v in = av in = pv in = 12 v, switching frequency = 650 khz, v mode = v reg (fccm) t a = 25 ? c ? 2 ? c unless otherwise noted. doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 7 of 32 product standards parameter symbol condition limits unit note min typ max protection dc-dc over current protection limit i lmt ??4 . 5?a * 1 dc-dc short circuit protection threshold i short v fb = 0.6 v to 0.0 v 50 60 70 % ? thermal shut down (tsd) threshold t tsdth ? ? 130 ? ? c *1 thermal shut down (tsd) hysteresis t tsdhys ??3 4? ? c *1 soft start timing ss charge current i ssch v ss = 0.3 v 1.1 2.3 3.5 a ? ss discharge resistance (shut down) r ssdch v en = 0 v ? 5 10 k? ? switching frequency dc-dc switching frequency 1 f sw1 i out = 1.5 a ? 210 ? khz *1 dc-dc switching frequency 2 f sw2 i out = 1.5 a ? 430 ? khz *1 dc-dc switching frequency 3 f sw3 i out = 1.5 a ? 650 ? khz *1 note : *1 : typical design value electrical characteristics (continued) c o = 22 f ? 2, l o = 1 h, v out setting = 1.2 v, v in = av in = pv in = 12 v, switching frequency = 650 khz, v mode = v reg (fccm) t a = 25 ? c ? 2 ? c unless otherwise noted. doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 8 of 32 product standards pin configuration top view pin no. pin name type description 1 lx output power mosfet output pin an inductor is connected and switching operation is carried out between v in and gnd. due to high current and large amplitude at this terminal, the parasitic inductance and impedance of the routing path can cause an increase in noise and a degradation in the efficiency. routing path should be kept as short as possible. 2 3 4 5 6 7 pgnd ground ground pin for power mosfet 8 9 10 mode input skip (discontinuous) mode / fccm (forced continuous conduction mode ) select pin skip mode is set at low level input, fccm is set at high level input. 11 agnd ground ground pin 20 12 avin power supply power supply pin recommended rise time ( time to reach 90 % of set value ) setting is greater than or equal to 10 s and less than or equal to 1 s. 13 fsel input frequency selection pin this is set to 430 khz at low level input, 210 khz at high level input, and 650 khz at open. 14 en input on / off control pin dc-dc is stopped at low level input, and it is started at high level input. pin functions note : detailed pin descriptions are provided in the operation and application information section. lx mode agnd pgnd avin fsel en vreg vfb vout ss pgood agnd bst pvin 16 7 10 12 13 18 19 20 24 26 pvin 25 agnd 27 lx 21 22 23 17 16 15 14 11 8 9 5432 doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 9 of 32 product standards pin no. pin name type description 15 vreg output ldo output pin this is output pin of power supply (ldo) for internal control circuit. please connect capacitor between vreg and gnd. 16 vfb input comparator negative input pin vfb terminal voltage is regulated to ref output (internal reference voltage). since vfb is a high impedance terminal, it should not be routed near other noisy path (lx, bst, etc.) or an inductor routing path should be kept as short as possible. 17 vout input output voltage sense pin switching frequency is controlled by monitoring output voltage. 18 ss output soft start capacitor connect pin the output voltage at a start up is smoothly controlled by adjusting soft start time. please connect capacitor between ss and gnd. 19 pgood output power good open drain pin a pull up resistor between pgood and vreg terminal is necessary. output is low during over or under voltage detection conditions. 21 bst output high side power mosfet gate driver pin bootstrap operation is carried out in order to drive the gate voltage of high side power mosfet. please connect a capacitor between bst and lx. routing path should be kept as short as possible to minimize noise. 22 pvin power supply power supply pin for power mosfet recommended rise time ( time to reach 90 % of set value ) setting is greater than or equal to 10 s and less than or equal to 1 s. 23 24 25 agnd ground ground pin for heat radiation 26 pvin power supply power supply pin for heat radiation 27 lx output power mosfet output pin for heat radiation pin functions (continued) note : detailed pin descriptions are provided in the operation and application information section. doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 10 of 32 product standards functional block diagram note : this block diagram is for explaining functions. part of the block diagram may be omitted, or it may be simplified. control logic soft-start vin 0.6 v vref hgate uvlo scp ocp tsd ref on cmp toff timer + comp ton timer + comp fccm / skip 0.6 v + 15 % 0.6 v ? 15 % aux timer coast fault vreg : 5.7 v on / off soft-start ss vreg bgr vint vref en hpd hgo lpd lgo lgate vreg vout vfb fsel mode agnd ss avin pgood bst lx pgnd pvin 22,23,24,26 19 21 1,2,3, 4,5,6, 27 7,8,9 11,20,25 10 16 17 15 13 14 18 12 doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 11 of 32 product standards operation 1. protection (1) over current protection (ocp) and short circuit protection (scp) 1) the over current protection is activated at about 4.5 a (typ). this device uses pulse ? by ? pulse valley current protection method. when the low side power mosfet is turned on, the voltage across the drain and source is monitored which is proportional to the inductor current. the high side power mosfet is only allowed to turn on when the current flowing in the low side power mosfet falls below the ocp level. hence, during the ocp, the output voltage continues to drop at the specified current. ocp is a non ? latch type protection. 2) the short circuit protection function is implemented when the output voltage decreases and the vfb pin reaches to 60 % of the set voltage (0.6 v). if the vfb voltage stays below 60 % of the set voltage over 250 s after scp triggers, both high side and low side power mosfet will be latched off and the output will be discharged by internal mosfet. power reset or en pin reset is necessary to activate the device again. figure : ocp and scp operation output current [a] (ground short protection detection 60% of vout ) over current protection ( typ : 4.5 a ) output voltage [v] 1) 2) 3.2 a to 7 a (2) over voltage detection (ovd) if the vfb pin voltage exceeds 115 % of the set voltage (0.6 v) and lasts more than 10 ns, over voltage detection will be tr iggered and pgood pin will be pulled down. furthermore, in an over voltage condition, high side power mosfet is turned off to stop pwm operation, and low side power mosfet is turned on and held on until the inductor current starts to flow back to the device (for both skip mode and fccm settings). if the vfb pin voltage drops below 110 % of the set voltage within 30 s after over voltage detection triggers, pgood pin will be pulled up again and pwm operation will resume. otherwise, both high side and low side mo sfet will be latched off and the output will be discharged by internal mosfet. power reset or en pin reset is necessary to activate the device again. >30us (typ) figure : ovd operation 115 % 110 % 90 % 85 % 0.6 v vfb pgood 1 ms note: pgood pin is pulled up to vreg pin 0.6 v <30us (typ) (3) output discharging function when en is low, the output is discharged by an internal mosfet that is connected to vout pin. when en is high, if the controller is turned off by under voltage lock out, or the controller is latched off by over voltage detection or short circuit protection, the output is discharged by the above said internal mosfet. the on resistance of the internal mosfet is 50 ? . doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 12 of 32 product standards 1. protection (continued) (4) under voltage detection (uvd) during the operation, if the output voltage drops and the vfb pin voltage reaches 85 % of the set voltage (0.6 v), the mosfet, the drain of which is connected to pgood pin, will turn on and pull the voltage of pgood to be low. if the output voltage continues to drop and vfb pin voltage reaches 60 % of the set voltage (0.6 v), short circuit protection (scp) will be triggered. if the output voltage returns to 90 % of the set voltage (0.6 v) before triggering short circuit protection, the mosfet that is connected to pgood pin will turn off after 1 ms and pgood voltage will become logic high. (5) thermal shut down (tsd) when the ic internal temperature becomes more than about 130 ? c, tsd operates and dc-dc turns off. figure : uvd operation 90 % 85 % 0.6 v vfb pgood 1 ms 60 % note: pgood pin is pu lled up to vreg pin (2) switching frequency setting the ic can operate at three different frequency : 650 khz, 430 khz and 210 khz. the switching frequency can be set by fsel pin as follows. 2. pin setting (1) operating mode setting the ic can operate at two different modes : skip (discontinuous) mode and forced continuous conduction mode (fccm). in skip mode, the ic is working under pulse skipping mechanism to improve efficiency at light load condition. in fccm mode, the ic is working at fixed frequency to avoid emi issues. the operating mode can be set by mode pin as follows. mode pin mode low skip mode high fccm fsel pin frequency [khz] low 430 high 210 open 650 doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 13 of 32 product standards 3. output voltage setting the output voltage can be set by external resistance of vfb pin, and its calculation is as follows. below resistors are recommended for following popular output voltage. operation (continued) v out = (1 + ) ? 0.6 r fb1 r fb2 v out r fb1 v fb (0.6 v) r fb2 v out [v] r fb1 [? ]r fb2 [? ] 5.0 11.0 k 1.5 k 3.3 4.5 k 1.0 k 1.8 2.0 k 1.0 k 1.2 1.5 k 1.5 k 1.0 1.0 k 1.5 k note : r fb2 can be set to a maximum value of 10 k ? . a larger r fb2 value will be more susceptible to noise. vfb comparator threshold is adjusted to ? 1 %, but the actual output voltage accuracy becomes more than ? 1 % due to the influence from the circuits other than vfb comparator. in the case of v out setting = 3.3 v, the actual output voltage accuracy becomes ? 2.5 %. (fccm, v in = 12 v, i out = 0 a, switching frequency = 650 khz) 4. soft start setting soft start function maintains the smooth control of the output voltage during start up by adjusting soft start time. when the en pin becomes high, the current (2 a) begin to charge toward the external capacitor (c ss ) of ss pin, and the voltage of ss pin increases straightly. because the voltage of vfb pin is controlled by the voltage of ss pin during start up, the voltage of vfb increase straightly to the regulation voltage (0.6 v) together with the voltage of ss pin and keep the regulation voltage after that. on the other hand, the voltage of ss pin increase to about 2.8 v and keep the voltage. the calculation of soft start time is as follows. c ss : external capacitor value of ss pin soft start setting [s] = ? c ss 0.6 2 en ss vout vfb 0.6 v soft start time [s] figure : soft start operation uvlo vreg 4.2 v doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 14 of 32 product standards operation (continued) 5. start up / shut down settings the start up / shut down is enabled by the en pin. the en pin can be set by either applying voltage from an external voltage source or through a resistor connected to the avin pin. case 1 : setting up the en pin using an external voltage source. when an external voltage source is used, the en pin input voltage (v enh , v enl ) should satisfy the conditions as defined in the electrical characteristics. case 2 : setting up the en pin through a resistor connected to avin pin. when setting up the en pin through a resistor connected to the avin pin, refer to equations (1) and (2) to calculate the optimal resistor settings. (1) : r en1 > id av in ?vd (2) : r en1 < v enh (av in ?v enh ) ? r en2 100 a 12 v ? 6 v = 60 k ? 5 v (12 v ? 5 v) ? 400 k ? = 560 k ? (1) : r en1 > (2) : r en1 < 0 v 5 v (max) avin vreg 14 en figure : internal circuit with en pin avin vreg 14 avin en r en1 500 r en2 : 800 k ?? 50 % vd : 5.7 v ? 0.3 v id : more than 100 a figure : internal circuit with en pin [equation] [example] doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 15 of 32 product standards operation (continued) 6. power on / off sequence (1) when the en pin is set to high after the v in settles, the bgr and the vreg start up. (recommended v in rise time setting is greater than or equal to 10 s and less than or equal to 1 s.) (2) when the vreg pin exceeds its threshold value, the uvlo is released and the soft start sequence is enabled. the capacitor connected to the ss pin begins to charge and the ss pin voltage increases linearly. (3) the vout pin (dc-dc output) voltage increases at the same rate as the ss pin. normal operation begins after the vout pin reaches the set voltage. (4) when the en pin is set to low, the bgr, vreg and uvlo stop operation. the vout pin / ss pin voltage starts to drop and the vout pin discharge time depends on the value of the feedback resistors and the output load current. note : the ss pin capacitor should be discharged completely before restarting the startup sequence. an incomplete discharge process might result in an overshoot of the output voltage. uvlo ss vout vreg 4.2 v (1) (2) (3) (4) vfb 0.6 v en pgood 2 delay time [s] = 0.09 ? c ss + 1 m figure : power on / off sequence soft start time [s] = 2 0.6 ? css v in greater than or equal to 10 s, less than or equal to 1 s 90% doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 16 of 32 product standards 7. inductor and output capacitor setting given the desired input and output voltages, the inductor value and operating frequency determine the ripple current. 2 il iox ? ? ?? floei eoeieo il ?? ?? ?? highest efficiency operation is obtained at low frequency with small ripple current. however, achieving this requires a large inductor. there is a trade off among component size, efficiency and operating frequency. a reasonable starting point is to choose a ripple current that is about 40 % of i o (max). the largest ripple current occurs at the highest ei. to guarantee that ripple current does not exceed a specified maximum, the inductance should be chosen according to: ? ? ei_max ei @ 2 ? ?? ? ? ? fioxei eoeieo lo and its maximum current rating is ei_max ei @ 2 io_max _max ? ? ?? il il the selection of c o is primarily determined by the esr (r c ) required to minimize voltage ripple and load transients. the output ripple v rpl is approximately bounded by: ?? 2 2 2 82 82 fcoloei eoeieo lo rcco ei fco il lo rcco eivobvopvrpl ??? ?? ? ? ?? ? ? ? ? ???? from the above equation, to achieve desired output ripple, low esr ceramic capacitors are recommended, and its required rms current rating is: ei_max ei @ 32 (rms)_max ? ? ? il ic operation (continued) il i o i c 0 0 e o ? il / 2 ton t = 1 / f v o v rpl ? il / 2 q2 q1 v o (e o ) l o c o il ei i o i c r c doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 17 of 32 product standards typical characteristics curves 1. output ripple voltage condition : v in = 12 v, v out setting = 1.2 v, switching frequency = 650 khz, skip mode, l o = 1 h, c o = 44 f (22 f x 2) i out = 0 a i out = 100 ma i out = 1 a i out = 3 a vout lx vout lx vout lx vout lx doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 18 of 32 product standards typical characteristics curves (continued) 1. output ripple voltage (continued) condition : v in = 12 v, v out setting = 1.2 v, switching frequency = 650 khz, fccm, l o = 1 h, c o = 44 f (22 f x 2) i out = 0 a i out = 100 ma i out = 1 a i out = 3 a vout lx vout lx vout lx vout lx doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 19 of 32 product standards 2. load transient response condition : v in = 12 v, v out setting = 1.2 v, switching frequency = 430 khz, i out = 10 ma to 3 a (0.5 a / s), l o = 1 h, c o = 44 f (22 f x 2) typical characteristics curves (continued) condition : v in = 12 v, v out = 1.2 v, switching frequency = 430 khz, i out = 10 ma to 3 a (0.15 a / s), l o = 1 h, c o = 44 f (22 f x 2) vout (100mv/div) 36mv 41mv iout (2a/div) time (500us/div) vout (100mv/div) 37mv 42mv iout (2a/div) time (100us/div) vout (100mv/div) 31mv 38mv iout (2a/div) time (500us/div) vout (100mv/div) 29mv 36mv iout (2a/div) time (100us/div) doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 20 of 32 product standards typical characteristics curves (continued) 3. efficiency condition : v in = 12 v, v out setting = 1.05 v / 1.2 v / 1.8 v / 3.3 v / 5.0 v, switching frequency = 430 khz, l o = 1 h, c o = 44 f (22 f x 2) condition : v in = 12 v, v out setting = 1.2 v / 1.2 v / 1.8 v / 3.3 v / 5.0 v, switching frequency = 650 khz, l o = 1 h, c o = 44 f (22 f x 2) doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 21 of 32 product standards typical characteristics curves (continued) 4. load regulation condition : v in = 12 v, v out setting = 1.2 v, switching frequency = 430 khz, l o = 1 h, c o = 44 f (22 f x 2) condition : v in = 12 v, v out setting = 1.2 v, switching frequency = 650 khz, l o = 1 h, c o = 44 f (22 f x 2) load regulation_f = 430khz (skip mode) 1.10 1.12 1.14 1.16 1.18 1.20 1.22 1.24 1.26 1.28 1.30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 iout (a) vout (v) load regulation_f = 650khz (skip mode) 1.10 1.12 1.14 1.16 1.18 1.20 1.22 1.24 1.26 1.28 1.30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 iout (a) vout (v) load regulation_f = 430khz (fccm) 1.10 1.12 1.14 1.16 1.18 1.20 1.22 1.24 1.26 1.28 1.30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 iout (a) vout (v) load regulation_f = 650khz (fccm) 1.10 1.12 1.14 1.16 1.18 1.20 1.22 1.24 1.26 1.28 1.30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 iout (a) vout (v) doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 22 of 32 product standards typical characteristics curves (continued) 5. line regulation condition : v out setting = 1.2 v, switching frequency = 430 khz, i out = 1.5 a, l o = 1 h, c o = 44 f (22 f x 2) line regulation_f = 430khz (skip mode) 1.10 1.12 1.14 1.16 1.18 1.20 1.22 1.24 1.26 1.28 1.30 0 5 10 15 20 25 30 vin (v) vout (v) line regulation_f = 430khz (fccm) 1.10 1.12 1.14 1.16 1.18 1.20 1.22 1.24 1.26 1.28 1.30 0 5 10 15 20 25 30 vin (v) vout (v) doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 23 of 32 product standards typical characteristics curves (continued) 6. start / shut down condition : v in = 12 v, v out setting = 1.2 v, switching frequency = 430 khz, skip mode, i out = 0 a, l o = 1 h, c o = 44 f (22 f x 2) condition : v in = 12 v, v out setting = 1.2 v, switching frequency = 430 khz, fccm, i out = 0 a, l o = 1 h, c o = 44 f (22 f x 2) en (2 v/div) vout (0.5 v/div) ss (2 v/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) time (10 ms/div) time (10 ms/div) time (10 ms/div) time (10 ms/div) doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 24 of 32 product standards typical characteristics curves (continued) 6. start / shut down (continued) condition : v in = 12 v, v out setting = 1.2 v, switching frequency = 430 khz, skip mode, r load = 0.5 ? , l o = 1 h, c o = 44 f (22 f x 2) condition : v in = 12 v, v out setting = 1.2 v, switching frequency = 430 khz, fccm, r load = 0.5 ? , l o = 1 h, c o = 44 f (22 f x 2) en (2 v/div) vout (0.5 v/div) ss (2 v/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) time (10 ms/div) time (10 ms/div) time (10 ms/div) time (10 ms/div) doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 25 of 32 product standards typical characteristics curves (continued) 7. short circuit protection condition : v in = 12 v, v out setting = 1.2 v, switching frequency = 430 khz, l o = 1 h, c o = 44 f (22 f x 2) ss (2 v/div) time (10 ms/div) lx (10 v/div) vout (1 v/div) iout (5 a/div) time (10 ms/div) lx (10 v/div) vout (1 v/div) ss (2 v/div) iout (5 a/div) skip mode fccm doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 26 of 32 product standards typical characteristics curves (continued) 8. switching frequency condition : v in = 12 v, v out setting = 1.2 v, switching frequency = 430 khz, i out = 10 ma to 3 a, l o = 1 h, c o = 44 f (22 f x 2) condition : v out setting = 1.2 v, switching frequency = 430 khz, i out = 3 a, l o = 1 h, c o = 44 f (22 f x 2) lx average frequency (mhz) fccm 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.01 0.1 1 10 iload (a) lx average frequency (mhz) lx average frequency (mhz) skip mode 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.01 0.1 1 10 iload (a) lx average frequency (mhz) lx average frequency (mhz) skip mode 0.0 0.1 0.2 0.3 0.4 0.5 0.6 4 6 8 10121416182022242628 vin(v) lx average frequency (mhz) lx average frequency (mhz) fccm 0.0 0.1 0.2 0.3 0.4 0.5 0.6 4 6 8 10121416182022242628 vin(v) lx average frequency (mhz) doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 27 of 32 product standards typical characteristics curves (continued) 9. thermal performance condition : v in = 12 v, v out setting = 1.2 v, switching frequency = 430 khz, fccm, i out = 3 a, l o = 1 h, c o = 44 f (22 f x 2) doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 28 of 32 product standards figure : layout figure top layer with silk screen ( top view ) with evaluation board figure bottom layer with silk screen ( bottom view ) with evaluation board applications information 1. evaluation board information condition : v out setting = 1.2 v, switching frequency = 650 khz, skip mode note : the application circuit diagram and layout diagram explained in this section, should be used as reference examples. the operation of the mass production set is not guarant eed. sufficient evaluation and verification is required in the design of the mass production set. the customer is fully responsible for the incorporation of the above illustrated application circuit and th e information attached with it, in the design of the equipment. figure : application circuit nn30320a pgnd vout c-dcdcout1 c-dcdcout2 c-dcdcout3 l-lx c-avin1 c-avin2 c-pvin5 c-pvin6 r-fbx r-fbx vfb lx pvin avin vout c-bst ss c-vreg 789 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 1234 56 fsel l-lx r-fb3 r-fb2 c-dcdcout1 c-dcdcout2 r-fb4 r-fb1 lx bst mode agnd avin en vreg vfb vout ss pgood agnd pvin c-pvin5 c-pvin6 c-avin1 c-avin2 c-bst dcdcout r-pg pvin c-ss ss c-vreg vout doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 29 of 32 product standards applications information (continued) 2. layout recommendations board layout considerations are necessary for stable operation of the dc-dc regulator. the following precautions must be used when designing the board layout. (a) the input capacitor c in must be placed in such a way that the distance between pvin and pgnd is minimum, in order to suppress the switching noise. stray inductance and impedance should be reduced as indicated by loop (1) in the figure below. (b) a single point ground connection (2) must be used to connect pgnd and agnd to improve operation stability. (c) output current line i out and the output sense line vout must have small common impedance to reduce output load variations. output sense line vout must be close to the output condenser c o as indicated by (3) below. (d) power loss and output ripple voltage can be reduced by placing the inductor l o and output capacitor c o such that the stray inductance and the impedance of loop (4) is minimum. this is realized by : i) minimizing distance between inductor l o and lx pin. ii) reducing distance between output capacitor c o and (2) / (3) (e) thick lines in the application circuit example represent lines with large current flow. these lines should be designed as thick as possible. (f) vfb / ss / vreg lines should be placed far away from lx line, bst line and inductor l o to reduce the effects of switching noise. these lines should be designed as short as possible. this is especially true for the vfb line, which is a high impedance line. (g) r fb1 / r fb2 should also be placed as far away as possible from lx line, bst line and inductor l o to minimize the effects of switching noise. r fb1 / r fb2 should be placed close to the vfb pin. (h) lx / bst lines are noisy lines. they should be designed as short as possible. note : the application circuit diagram and layout diagram explained in this section, should be used as reference examples. the operat ion of the mass production set is not guaranteed. sufficient evaluation and verification is required in the design of the mass production set. the customer is fully responsible for the incorporation of the above illustrated applic ation circuit and the information attached with it, in the design of the equipment. vfb vreg bst lx pgnd agnd ss avin pvin vout i out c o c in r fb1 r fb2 (1) (4) (3) (2) l o figure : application circuit diagram doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 30 of 32 product standards applications information (continued) 3. recommended component reference designator qty value manufacturer part number note c-avin1 2 10 f taiyo yuden umk325ab7106mm-t ? c-avin2 1 0.1 f murata grm188r72a104ka35l ? c-bst 1 0.1 f murata grm188r72a104ka35l ? c-dcdcout 2 22 f murata grm32er71e226ke15l ? c-pvin5 2 10 f taiyo yuden umk325ab7106mm-t ? c-pvin6 1 0.1 f murata grm188r72a104ka35l ? c-ss 1 10 nf murata grm188r72a103ka01l ? c-vreg 1 1.0 f murata grm188r71e105ka12l ? l-lx 1 1.0 h panasonic ETQP3W1R0WFN fsel : gnd (430 khz) open (650 khz) 4.7 h panasonic etqp3w4r7wfn fsel : vreg (210 khz) r-fb1 1 1.5 k ? panasonic erj3ekf1501v ? r-fb2 1 0 ? panasonic erj3gey0r00v ? r-fb3 1 1.5 k ? panasonic erj3ekf1501v ? r-fb4 1 0 ? panasonic erj3gey0r00v ? r-pg 1 100 k ? panasonic erj3ekf1003v ? doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 31 of 32 product standards outline drawing package code : hqfn024-a3-0404bzf package information unit : mm body material : br / sb free epoxy resin lead material : cu alloy lead finish method : pd plating doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
nn30320a page 32 of 32 product standards important notice 1. when using the ic for new models, verify the safety including the long-term reliability for each product. 2. when the application system is designed by using this ic, please confirm the notes in this book. please read the notes to descriptions and the usage notes in the book. 3. this ic is intended to be used for general electronic equipment. consult our sales staff in advance for information on the following applications: special applications in which exceptional quality and reliab ility are required, or if the failure or malfunction of this ic may directly j eopardize life or harm the human body. any applications other than t he standard applications intended. (1) space appliance (s uch as artificial satellite, and rocket) (2) traffic control equipment (such as for automotive, airplane, train, and ship) (3) medical equipment for life support (4) submarine transponder (5) control equipment for power plant (6) disaster prevention and security device (7) weapon (8) others : applications of which reliability equivalent to (1) to (7) is required our company shall not be held responsible for any damage incurred as a result of or in connection with the ic being used for any special application, unless our company agrees to the use of such special application. however, for the ic which we designate as products for automotive use, it is possible to be used for automotive. 4. this ic is neither designed nor intended for use in automotiv e applications or environments unless the ic is designated by ou r company to be used in automotive applications. our company shall not be held responsible for any damage incurred by customers or any third party as a result of or in connection with the ic being used in automotive application, unless our company agrees to such application in this book. 5. please use this ic in compliance with all applicable laws and regulations that regulate the in clusion or use of controlled substances, including without limitation, the eu rohs directive. our company shall not be held responsible for any damage incurred as a result of our ic being used by our customers, not complying with the applicable laws and regulations. 6. pay attention to the direction of t he ic. when mounting it in the wrong direction onto the pcb (printed-circuit-board), it might be damaged. 7. pay attention in the pcb (printed-circuit-board) pattern layo ut in order to prevent damage due to short circuit between pins. in addition, refer to the pin description for the pin configuration. 8. perform visual inspection on the pcb before applying power, otherwise damage might happen due to problems such as solder-bridge between the pins of the ic. also, perform full technical verification on the assembly quality, because the same damage possibly can happen due to conductive substances, such as solder ball, that adhere to the ic during transportation. 9. take notice in the use of this ic that it might be damaged when an abnormal state occurs such as output pin-vcc short (power supply fault), output pin-gnd short (ground fault), or output -to-output-pin short (load short). safety measures such as installation of fuses are recommended because the ext ent of the above-mentioned damage will depen d on the current capability of the power supply. 10. the protection circuit is for maintaining safety against abno rmal operation. therefore, the protection circuit should not w ork during normal operation. especially for the thermal protection circuit, if the area of safe operation or the absolute maximum rating is momentarily exceeded due to output pin to vcc short (power supply fault), or output pin to gnd short (ground fault), the ic might be damaged before the thermal protection circuit could operate. 11. unless specified in the pr oduct specifications, make sure that negative voltage or excessiv e voltage are not applied to the pins because the ic might be damaged, which could happen due to negative voltage or excessive voltage generated during the on and off timing when the inductive load of a motor co il or actuator coils of optical pick-up is being driven. 12. product which has specified aso (area of safe operation) should be operated in aso 13. verify the risks which might be caused by the malfuncti ons of external components. 14. connect the metallic plates (fins) on the ba ck side of the ic with their respective potentials (agnd, pvin, lx). the thermal resistance and the electric al characteristics are guaranteed only when the metallic plates (fins) are connected with their respective potentials. doc no. ta4 -ea-06187 revision . 2 established : 2013-06-20 revised : 2015-02-08
request for your special attention and precautions in using the technical information and semiconductors described in this book (1) if any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) the technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. no license is granted in and to any intellectual property right or other right owned by panasonic corporation or any other company. therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) the products described in this book are intended to be used for general applications (such as office equipment, communications equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book. consult our sales staff in advance for information on the following applications: ? special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. it is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the products described in this book for any special application, unless our company agrees to your using the products in this book for any special application. (4) the products and product specifications described in this book are subject to change without notice for modification and/or im- provement. at the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date product standards in advance to make sure that the latest specifications satisfy your requirements. (5) when designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. otherwise, we will not be liable for any defect which may arise later in your equipment. even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (esd, eos, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. when using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) this book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20100202

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